FPGA simulation implementation of RFID anti-collision algorithm
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(Radio Frequency Identification) It is an identification technology that uses wireless channels to achieve two-way communication, Can identify long-distance tagged targets,,And read and write related data.RFIDThe system can recognize high-speed moving objects and can recognize multiple targets at the same time,The operation is quick and convenient.This article is based onRFIDsystem,Solve the conflict problem of identifying multiple targets at the same time.
1 Overview
RFIDThe system is mainly composed of two parts: radio frequency communication and computer information system,in,The radio frequency communication part mainly includes readers and tags(Radio frequency card).There are two forms of communication:Data transmission from reader to electronic label,That is, the data stream sent by the reader is received by multiple tags within its coverage,This form of communication is also called radio broadcasting;Multiple tags respond at the same time within the range of the reader,This form is called multiple access.In the latter form of communication,The aliasing problem of label data is called the collision problem.In order to prevent the data of multiple electronic tags from colliding with each other in the receiver of the reader, it cannot be read accurately, Anti-collision algorithm must be used[2]To overcome it.
1.1 Anti-collision algorithm
ISO 14443- 3[3]StipulatedTYPE AandTYPE BTwo anti-collision mechanisms.The principle of the two anti-collision mechanisms is different, The former is based on bit collision detection protocol, andTYPE BThe anti-collision is completed through a series of command sequences.ISO15693Use polling mechanism,Time-sharing query method to complete the anti-collision mechanism,This is specified in the third part of the standard.The existing anti-collision algorithms based on this includeALOHA[4]Algorithm, gap ALOHAAlgorithms and binary tree search algorithms, etc.,The best channel utilization of the first two are respectively18.4%and36.8%,But as the number of tags increases,Performance will deteriorate drastically. The binary tree search algorithm has greatly improved the number and speed of reading tags at one time.
1.2 Principle of Binary Tree Search Anti-collision Algorithm
Binary tree search anti-collision algorithm[5]Apply toTYPE A.AType label adoptsManchesterEncoding,This makes it possible to accurately determine the collision position.picture1Shown as exploitManchesterCoding recognition collision bit.
When the reader receives the sent tag signal,First determine whether there is a collision and the specific location of the collision,Then determine the parameters in the next request command sent according to the specific location of the collision,Resend,Until one of the labels is confirmed.For ease of explanation,Assume that the data of the label is 8bit,And define the commandcall (epc, m),Its meaning is:The reader sends a call command to the tags within its coverage, If the label data[7]andcallCommandepcBefore the parametermBit equal,Then the label that meets this condition responds.Assume that at a certain moment, four tags enter the range of the reader at the same time,theirEPCThe codes aretag1 =10100011, tag2=10011011, tag3=00010001, tag4=11101100.The algorithm flow diagram is shown in the figure2Shown.
D2As can be seen,callCommandedepcThe parameter is judged by the collision position, andcallIn the commandmThe parameters are in turn determined by the correspondingepcParameter calculation,This makes the algorithm skip idle nodes during execution,Improve the execution efficiency of the algorithm.And because the algorithm can be vividly described by a binary tree, So called “Binary tree anti-collision algorithm“.
2 Collision algorithm FPGA Simulation implementation
Most of the anti-collision algorithms currently used are implemented by software,It is easy to cause the application software to be very complicated and the application speed of multiple cards is slow.therefore, Use a combination of software and hardware,use FPGA[6]Implement anti-collision algorithms,It can meet the requirements of fast speed and low cost.
twenty one Overall design
EPCThe label module can be abstracted into one Manchester Encoder module,RFID The reader contains three basic functional modules::Manch-ester Decoder module,LIFO Module and the state machine module that controls the entire algorithm.The connection relationship of the basic modules is shown in the figure 3 Shown.
The specific workflow is as follows:
(1) RFID The state machine inside the reader is sent every once in a while call Order;
(2) The tags within the coverage of the reader are received call After the command, judge whether it is satisfied call Condition of order, Send if satisfied epc Code to reader, Otherwise no reaction;
(3) The reader receives the data from the tag and performsManchester decoding.If no collision occurs, force the tag to sleep after storing the data; If there is a collision, Then proceed to the next time according to the solved data and the collision bit flagcallOrder. This loop is executed until all tags within the range of the reader are identified.
This article adoptsVerilog HDL Language as design input,Simulation tools adopt Quartus II 5.1 build 216 03/06/2006 SJ Full Version; FPGA The device is EP2C5T144C6.
2.2 RFID Design and simulation of each module of the reader
2 .2 .1 Manches ter Encoder
Manchester The encoder is RFID Label, Its main data input includes the data of the label,callor sleepCommand flags and correspondingepcParameters andmparameter.When receivedRFIDThe reader, that is, the algorithm controls the control signal of the state machine to make corresponding judgments,If satisfiedcallThe condition of the command starts to perform the label data Manchester coding, After encoding, send the encoded data toManchester decoder, Manchester After the decoder receives the data, it starts decoding.If satisfiedsleepCondition of order,Tag goes to sleep,For the futurecallThe command does not respond.
2 .2 .2 Manches ter decoder
Manchester Decoding and collision bit judgment are the key to the entire skipping binary tree anti-collision algorithm.Decoding and collision judgment are both determined byManchester Decoder module completed.Firstly, Manchester A two-bit shift register is defined in the decoder module, Used to detect tags sentManchester Sync header,In order to cut off the arrival of the code.Once the shift register detects the sync head of the signal sent by the tag, Manchester The decoder starts decoding work. The generation of the sampling signal can be realized by a counter that counts in cycles.The counter automatically increments when the edge of the high-frequency clock arrives 1, Its cycle period is the same as Manchester The encoding clock period is equal.To prevent delay interference, In the counter cycle 1/4,3/4 Make the sampling signal high.When the decoding is completed, the decoder will send adata_ready Pulse signal, Indicates that the decoding has been completed, Data can be sent to the state machine.
picture 4 For the received data in[7], [5], [1]Timing simulation result of the decoder when bit collision phenomenon occurs.The circled part in the figure is the collision bit after decoding,It can be seen from the figure that the collision position is markedflag_outThe output data is 10100010,Knowable,Of received data[7],[5],[1]The bit collided.
2 .2 .3 Storage node LIFO Stack
LIFO(Last In First Out)The stack is used to store information about the nodes that have passed during the execution of the algorithm.For coordination LIFOInternal working status, existLIFOA small state machine is defined in the stack module.The flow chart of its working status and conversion conditions is shown in the figure 5Shown.
rightLIFOIntersperse the stack to write and read data, To verifyLIFOModule function.Write two data for the first time 10100011,11100010, Perform a read operation;Then write two data consecutively10101010,01011011,Four consecutive read operations.The simulation results are shown in the figure 6Shown.
From the picture6Can be seen,After writing two data for the first time,LIFOThe data in the stack is10100011,11100010, The top data of the stack is11100010,,Perform a read operation,The top data of the stack becomes10100011;Write two data consecutively for the second time 10101010,01011011Rear,The top data of the stack becomes01011011,After three consecutive reading operations,according toemptyThe sign signal can be seen at this timeLIFOAlready empty,,Therefore, no data was read during the fourth reading.
twenty three Comprehensive simulation
willManchesterCoding module,ManchesterDecoding module,LIFThe module and the algorithm control state machine module are connected to perform a comprehensive simulation of the algorithm.In the test, there are a total of four in the range of the readerRFIDLabel,Labelled EPCCode is8Bit binary code.The data information of the four labels are:tag1=10100011,tag2=10011011,tag3=00010001,tag4=11101100.The simulation results are shown in the figure7Shown.
3 Simulation result analysis
3.1 Maximum number of tags read at one time
pass throughLIFOThe simulation and analysis of the stack can draw the following conclusions: ifLIFOThe size isNUnits, Then the maximum number of tags that the algorithm can process at one time is N+1.This indicates that the maximum number of tags read by the system’s anti-collision algorithm at one time is determined by LIFO The design size of the stack is determined.differentFPGAThe available memory space of the device is different,The performance index based on the algorithm designed on it is also different from the current one.FPGAMost of the devices have built-in larger memory,For exampleAlteraThe company’s low costCyclone IISeries products,Maximum offer1.1Mbit Storage capacity.Can be estimated,Memory 1/4 Parameters used to store node information, 1/4 Collision bit flag for storing node information, 1/4 Used to store the solved label data, 1/4Reserved as system.Since the length of the tag data information is 64bit,useCycloneIIseriesFPGADevice implementation algorithm,Set the maximum number of tags that can be read at one time asNmax,Can be calculated:Nmax≈ 1.1× 1064×64=4296.
3.2 Algorithm recognition speed
ISO 14443Defined TYPE A,TYPE BTwo types of agreements,Its communication rate is106kbps. This standard is used to calculate the recognition speed of the algorithm.During the execution of the algorithm allCommand andsleep Command as a unit,,Send every time the command is executed64bitParameters,8bitofmparameter, Received tag return 64bit data,Co-transmission136bitThe data.in additioncall The processing of the data by the reader and the tag in the command also takes up a certain amount of time.Can be equivalent to transmitting less than 8bit The data.In this way, each command is executed in total 144bit Data transfer.so,Executable every secondcallNumber of commandsnfor:n≈ 106× 1024144=753.Known by the algorithm, When the number of tags in the area is L Time, All the executed call The number of commands is approximately 2L.
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